Like your creative use of DIS pin )
The question however is if DIS is a true open drain and pushing it above Vcc is really allowed. Datasheet is not clear on this, even more, a blanket statement of "Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a volt-
age greater than V+ + 0.3V or less than V- - 0.3V may cause destructive latchup. " is present. TLC555 explicitly allows for this, btw.
ouble device of 556 may save a bit of board space.
Chapter 5.1 Absolute maximum ratings clearly shows no limitation to the DIS voltage vs VDD, it just limits it to 18V (and 0.3V below GND). That means the output transistor (or an extra GGNMOS parallel to it) is all what is protecting this pin against ESD, forward body diode for negative and intrinsic bipolar Bvces for positive voltages. No diode towards VDD.
The previous "any input" line really limits to the VDD, so that tells to me there are just diodes towards VDD and GND as SD protections.
In fact you may always check this using a multimeter (if you have some clone IC where this is really not 100% clear how much identical the design is) - if you see a diode towards a supply, biasing that in forward (even less than 1mA) may trigger erratic behavior and when excessive (above the 50..100mA the normal CMOS are usually designed for), even a latchup.
And this is by far not limited to CMOS processes, it is common to any junction isnsulated monolithic process, whenever there is something looking like a diode biased in forward, you could be pretty damn sure it will be part of a parasitic bipolar. The only thing you do not know is where are all the collectors (there are more than one) and how much of the current flows there and how that part is sensitive.
But to activate the parasitic bipolar transistors (to e.g. trip the latchup), you need to forward bias their base-emitter (aka the diode your multimeter sees) first.
But if there is no such "diode" biased in forward, there won't be any parasitic collector currents...